Agemixer(07:18:01)
just read the ever counting counter into eternity... and fixup the delta values later. Problem! The c64-wise 22 cycles must be then hardcoded to the sampler device somehow. wellwell. 2 extra counters needed. and the first initian reset line of course
Agemixer(07:14:26)
how to no reset need? Oh yes! no resets at all.
Agemixer(07:13:23)
if cia no need reset then theres a chance for loop nicely at 44kHz (inx, bne for loop of 256 samples)
Agemixer(07:11:14)
22 cycles... no advance, and only speedcode... barely 44 kHz. Hmmz!!
Agemixer(07:10:20)
lda #n sta CIAreset lda CIAsmp sta samplehi,x lda userport sta samplelo,x
Agemixer(07:02:54)
but could be that normal bc547 transistor would be enough even if it "leaks" just a tad bit
Agemixer(07:00:34)
and kinda require FETs for up/down powering. the RC that strives to the input levels.
Agemixer(06:57:38)
just in theory it "boosts" to kinda 256 MHz instead of 1MHz for the first bits to be read, but instead, this is made the analog way.
Agemixer(06:54:09)
a littlebit insane approach, i admit