Agemixer(11:03:55)
the slowest way is to check for chance of scanline using 62 or 64 cycle counts while the actual rasterline lenghtvis 63cy. (PAL machine)
Agemixer(11:01:33)
yet 4th way to sync chips is about halving the jitter, reading every scanline changes (slow method but not slowest)
Agemixer(10:58:39)
(badline DMA or sprite DMA, CpU has to stop executing for others chips accessing the bus)
Agemixer(10:56:27)
Quite a trickery to synchronize CPU and graphics chip - there is also a DMA cycles choice of syncing in using the CPU execution cycles during DMA starts with 3 emptive cycles to get the CPU finish the command first
Agemixer(10:51:38)
so when an interrupt occurred, and reading whether 3rd scanline is reached at exact timing, then reducing one cycle
Agemixer(10:48:27)
they actually did it stable by interrupting at one scanline (raster int), then preparing int for the next scanline, and give NOPs that reduces the jitter to max 2 cycles instead of random 1..8,
Agemixer(10:45:17)
at that time i had no idea how they made it the exact timing actually so that was the only method i figured out
Agemixer(10:43:16)
..exact position. No extra devices required
Agemixer(10:42:58)
i invented this method stable raster timing ( =syncing CPU and Vic counts ) using the lightpen registers, triggering it internally and read lightpen X register to get an exact position for the CPU cycles to waste from that jitter to start always at